#VU103509 Security features bypass in ARM products - CVE-2024-5660
Published: February 3, 2025
Cortex-A77
Cortex-A78
Cortex-A78C
Cortex-A78AE
Cortex-A710
Cortex-X1
Cortex-X1C
Cortex-X2
Cortex-X3
Cortex-X4
Cortex-X925
Neoverse V1
Neoverse V2
Neoverse V3
Neoverse V3AE
Neoverse N2
ARM
Description
The vulnerability allows a malicious guest to compromise the hypervisor.
The vulnerability exists due to incorrect memory address translation when Hardware Page Aggregation (HPA) is enabled and Stage-1 and/or Stage-2 translation is enabled for the active translation regime. A malicious guest can bypass Stage-2 translation and/or GPT protection and compromise the host in certain hypervisor environments.